The continuing need for high-density electronic circuits has given rise to a class of high-density structures termed high-density interconnect (HDI), in which conventional semiconductor chips are fastened in two-dimensional arrays on a substrate, such as a ceramic substrate, with the electrical contact pads of the semiconductor chips facing upward, away from the substrate. Interconnections among the pads of the various semiconductor chips, and power connections, are made by one or more layers of dielectric film, preferably polyimide (KAPTON), which have a pattern of conductors on at least one side thereof, and which make contact with the various contact pads by means of electrically conductive through vias registered with the contact pads, and in electrical communication with the conductor pattern on the dielectric film, as described, for example, in U.S. Pat. No. 4,783,695, issued Nov. 8, 1988 in the name of Eichelberger et al. Later improvements of the structure are described in a large number of patents, among which are U.S. Pat. No. 4,714,516 (Method to Produce Via Holes in Polymer Dielectrics for Multiple Electronic Circuit Chip Packaging); U.S. Pat. No. 4,878,991 (Simplified Method for Repair of High Density Interconnect Circuits); U.S. Pat. No. 4,901,136 (Multi-Chip Interconnection Package); U.S. Pat. No. 4,933,042 (Method for Packaging Integrated Circuit Chips Employing a Polymer Film Overlay Layer); U.S. Pat. No. 5,019,946 (High Density Interconnect With High Volumetric Efficiency); U.S. Pat. No. 5,073,814 (Multi-Sublayer Dielectric Layers); U.S. Pat. No. 5,107,586 (Method for Interconnecting a Stack of Integrated Circuits at a Very High Density); U.S. Pat. No. 5,161,093 (Multiple Lamination High Density Interconnect Process and Structure Employing a Variable Crosslinking Adhesive); U.S. Pat. No. 5,200,810 (High Density Interconnect Structure with Top Mounted Components); U.S. Pat. No. 5,206,712 (Building Block Approach to Microwave Modules); U.S. Pat. No. 5,241,456 (Compact High Density Interconnect Structure); U.S. Pat. No. 5,270,371 (Adhesive Compositions for Electronic Packages); U.S. Pat. No. 5,285,571 (Method for Extending an Electrical Conductor Over the Edge of an HDI Substrate); U.S. Pat. No. 5,331,203 (High Density Interconnect Structure Including a Chamber); and U.S. Pat. No. 5,345,205 (Compact High Density Interconnected Microwave System). These patents relate to two-dimensional arrays of microcircuit chips (including stacks of chips, which are considered to be a single chip for purposes of this invention) on a substrate. When yet higher density is desired, three-dimensional arrays of HDI modules may be considered.
As is known to those skilled in the art, the reliability of a semiconductor chip depends in part upon its operating temperature, because diffusion of the semiconductor dopants can adversely affect performance, and the diffusion is a strong function of temperature. Silicon supplanted germanium as a semiconductor material for active circuits at least in part because it could withstand higher temperatures than germanium without severe adverse effects. Whatever semiconductor material is used in the microcircuit chips, it is imperative that the temperature of the chip be maintained below a particular design maximum temperature at which the reliability or mean time before failure (MTBF) is deemed to be satisfactory. This requirement, in turn, limits the combination of energization power and the thermal resistance between the microcircuit chip and the ultimate heat sink. The energization power will often be specified for a given level of performance, whereupon the thermal resistance is among the only variables available to the package designer. In general, a two-dimensional HDI array will be a relatively flat structure having two principal heat transfer surfaces, and with a relatively low ratio of volume to surface area. In some cases, simple convection will be sufficient to adequately cool the HDI module. If more heat must be carried away, one or more surfaces of the module may be thermally coupled to a heat sink, thereby reducing the thermal resistance between the package as a whole and the ultimate heat sink.
A standard HDI module which might be used for a two-dimensional microcircuit chip array includes a ceramic plate with a plurality of cavities or apertures, each of which is dimensioned to accommodate a particular chip or chip stack. The microcircuit contact pads or terminals face upward out of the cavity, and interconnections between the microcircuits on the module are made by means of a multilayer dielectric film, in which each layer carries a pattern of electrical conductors, and by a plurality of through vias, which are registered with, and interconnect, particular ones of the conductive paths of the pattern with particular contact pads of the chips.
When attempting to generate useful three-dimensional arrays of HDI modules, one of the problems which arises is that of conveying away heat generated by the microcircuit chips during operation. Among the heat transfer problems in stacks of two-dimensional HDI modules such as that described above, in order to form a three-dimensional array of microcircuit chips, is that of the relatively high thermal resistance (low thermal conductivity) of the multilayer dielectric film, which tends to inhibit heat transfer among the layers of HDI modules. Among the solutions which have been analyzed are those in which heat is transferred out through the edges of the module, which may be satisfactory for some situations, but which may not be adequate under all conditions. Improved three-dimensional arrays of microchip modules are desired.